17ips72 Schematic Work Jun 2026

A large, high-voltage electrolytic capacitor smooths this bumpy waveform. In regions with 230V mains, this line measures roughly 310V to 325V DC across the primary capacitor pins when idling.

Your here involves checking the Power Good (PG) signals. Each regulator outputs a PWR_GOOD (e.g., VR_READY , GFX_PG ). These feed into the EC and PCH (Platform Controller Hub). If one rail fails, the entire sequence stops. 17ips72 schematic work